MLSE-based EDC

While consumer demand continues to drive the migration to higher speed, higher bandwidth optical networks, implementing efficient, cost-effective connections across those networks presents increasingly imposing challenges. Link transmission impairments such as chromatic dispersion (CD), polarization mode dispersion (PMD), and other non-linearities require extensive optical bulk dispersion compensation modules and amplifiers. That, in turn, increases network complexity, adds noise reducing optical signal-to-noise ratio (OSNR) and limits network reach.

Engineers have long known that a more efficient method for building cost-effective, flexible and tolerant metro, regional and long haul networks lies in using digital electronic distortion compensation (EDC) solutions based on Maximum Likelihood Sequence Estimation (MLSE) techniques. MLSE evaluates a sequence of received data samples to determine the most likely correct transmitted sequence. Widely used in lower speed communication applications such as disk drives and voice band modems, this technology offers a more efficient architecture than first-generation EDC products that combine a feed-forward equalizer (FFE) with a decision feedback equalizer (DFE). The FFE-DFE approach reduces SNR by wasting useful signal energy in the process of subtracting trailing ISI. MSLE-based solutions also use an upfront FFE, but follow it with a Viterbi detector which analyzes all possible 2N combinations of the transmitted sequence and selects the combination that is closest to the received signal. As a result, MLSE-based architectures offer SNR performance that is typically 3-4 dB better than the FFE-DFE alternatives.  Today ClariPhy and it’s partners offer MLSE based solutions with TXFP and  technology is available in SFF 300-pin MSA and tunable XFP+ at very attractive price points.

ClariPhy’s recent development of all-CMOS MLSE-BASED EDC solutions alters that equation. With the development of highly integrated MLSE-based EDC ICs, service providers and network equipment developers can now take advantage of a higher performance solution that, unlike multi-chip implementations that use an Analog Front-End (AFE) fabricated in silicon germanium, only requires a single chip. Moreover, since this MLSE-based IC is available in standard CMOS, it leverages the traditional cost and power advantages that follow Moore’s law.

The benefits of the MLSE-based approach are compelling. By dramatically improving OSNR and doubling the reach of metro links, this new technology offers very attractive cost savings. The ability to eliminate costly dispersion compensation equipment (DCE), compensation fiber, ROADM and Regen and minimize amplification needs can drive down CAPEX costs by up to 50%. By simplifying the network architecture, reducing component count and improving reliability, the same technology can lower OPEX by as much as 25%. At the same time, a low power CMOS solution helps lower deployment costs by allowing equipment designers to double the density of ports on a line card. Finally, the use of a highly integrated, single-chip CMOS solution that offers a common scalable platform to next-generation networks promises equipment developers significantly shorter development cycles and a faster time-to-market.