CL1012
CL1012 CDR with EDC (MLSE) for Metro, Regional and Long Haul Telecom Networks
ClariPhy’s CL1012 clock and data recovery IC features integrated EDC to meet stringent SONET/SDH and DWDM requirements. This FFE/MLSE-based EDC solution is the only device of its type on the market today for 10G applications in low cost, low power CMOS. Leveraging those advantages, the device uses ½ the power and occupies ½ the footprint of competing MLSE solutions.
The CL1012 supports applications in standard 300-pin MSA optical transponders as well as XFP and XFP+ MSA optical modules. As bandwidth demands rise in telecom networks, equipment vendors are moving to higher density, higher performing DWDM platforms. XFP and XFP+ optical modules offer double the port density of traditional 300-pin MSA modules at lower power and cost. Through partnership with JDSU and other leading module supliers, ClariPhy has pioneered the XFP+ implementation using the CL1012, which offers all the benefits of a MLSE solution including improved tolerance to major impairments such as chromatic distortion (CD), first and second order polarization mode dispersion (PMD) and nonlinear distortion. New Tunable XFP (TXFP) applications are fully supported by the CL1012.
The CL1012 CDR with MLSE is manufactured in a 65 nm CMOS process and assembled in a 10×10 mm2 flip chip BGA package. Operating at data rates from 9.9 to 11.4 Gb/s, it tolerates ±4,000 ps/nm of CD and 100 ps of differential group delay (DGD), the key component of PMD.