Press Releases
Here are the latest announcements from ClariPhy
May 26, 2010
ClariPhy Announces $24 Million Investment, New Strategic Alliances Funding, OEM Partnerships Lay Foundation for Rapid Growth in 10G/40G/100G Optical Networking ICs
Irvine, CA (May 26, 2010) – ClariPhy Communications, a leader in ultra high speed mixed signal, digital signal processing (MXSP) integrated circuits for optical networks, today announced that it has secured $24M in series C funding. The financing includes new strategic investors – Oclaro, a tier-one provider of optical communications and laser components, and multiple telecom OEMs. All ClariPhy’s existing venture investors participated in this round, including Norwest Venture Partners, Allegis Capital, Onset Ventures and Pacific General Ventures. (read more)
May 26, 2010
Oclaro Accelerates 100 Gb/s Coherent Product Development through Alliance with ClariPhy Builds on 40 Gb/s DQPSK Leadership in Regional / Metro Segment; Expands into Long-Haul and Ultra-Long-Haul Markets
San Jose, Calif., – May 26, 2010 – Oclaro, Inc. (NASDAQ: OCLR), a tier-one provider of innovative optical communications and laser solutions, today announced it has made a $7.5 million strategic investment in ClariPhy Communications, a privately-held fabless semiconductor company focused on digital signal processing (DSP) and mixed-signal integrated circuits (ICs) for high-speed next-generation networks. In addition, ClariPhy and Oclaro have signed a Co-Marketing and Development Agreement leveraging ClariPhy’s industry-leading 40nm, single-chip products with Oclaro’s optical technology. The alliance with ClariPhy is an important milestone in Oclaro’s strategy to build upon its leadership position in 40 Gigabits per second (“Gb/s”) regional and metro networks and expand into the 100 Gb/s Coherent long-haul and ultra-long-haul markets.. (read more)
March 23, 2010
ClariPhy Granted US Patents Enabling Standards-Based Testing of Networking Components
Inventions Incorporated in High-Speed Networking Standards Covering 10G Ethernet, Fibre Channel, Serial Attached SCSI, and SFP+ Modules
IRVINE, Calif., March 23, 2010 – ClariPhy Communications, Inc., a fabless semiconductor company specializing in high speed communications ICs, today announced that it has been awarded two United States patents covering testing of key components in high-speed networking links. The patents cover inventions utilizing Waveform and Dispersion Penalty (WDP) and Transmitter Waveform and Dispersion Penalty (TWDP) performance metrics. This technology was first adopted in the IEEE 802.3 10 Gigabit (10G) Ethernet standard, applying to 10GBASE-LRM transmission on multimode fiber networks. (read more)
March 22, 2010
ClariPhy Announces MLSE-Based CDR for Line Cards with 10Gb/s Tunable XFP+ Modules
IRVINE, Calif. - (BUSINESS WIRE) - ClariPhy Communications, Inc., a fabless semiconductor company specializing in high speed communications ICs, today announced shipment of its CL1012 clock and data recovery (CDR) IC with maximum likelihood sequence estimation (MLSE) into line cards with Tunable XFP and XFP+ modules for 10 Gb/s optical networking. As video and other consumer applications dramatically increase the demand for bandwidth in telecommunications networks, equipment vendors are responding with higher density, higher performing DWDM platforms. The transition from 300 pin to tunable XFP optical modules more than doubles port density, while the incorporation of MLSE-based electronic dispersion compensation (EDC) on the line card significantly increases reach and tolerance to impairments while reducing network costs. (read more)